-----Original Message----- From: kernelnewbies- bounces+pranay.shrivastava=hcl.com@kernelnewbies.org [mailto:kernelnewbies- bounces+pranay.shrivastava=hcl.com@kernelnewbies.org] On Behalf Of kernelnewbies-request@kernelnewbies.org Sent: Monday, February 25, 2013 12:55 PM To: kernelnewbies@kernelnewbies.org Subject: Kernelnewbies Digest, Vol 27, Issue 52
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Today's Topics:
1. Re: atomic operations (Valdis.Kletnieks@vt.edu) 2. valid address space ? (Abu Rasheda) 3. Re: valid address space ? (Abu Rasheda) 4. barrier() (Shraddha Kamat) 5. Re: test jiffies on ARM SMP board (bill4carson) 6. Re: test jiffies on ARM SMP board (bill4carson) 7. Re: atomic operations (Kumar amit mehta) 8. (Prasad Lakshman)
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Message: 1 Date: Sun, 24 Feb 2013 18:24:21 -0500 From: Valdis.Kletnieks@vt.edu Subject: Re: atomic operations To: richard -rw- weinberger <richard.weinberger@gmail.com> Cc: Shraddha Kamat <sh2008ka@gmail.com>, kernelnewbies <kernelnewbies@kernelnewbies.org> Message-ID: <6017.1361748261@turing-police.cc.vt.edu> Content-Type: text/plain; charset="us-ascii"
On Sun, 24 Feb 2013 11:50:14 +0100, richard -rw- weinberger said:
On Sun, Feb 24, 2013 at 10:42 AM, Shraddha Kamat <sh2008ka@gmail.com> wrote:
what is the relation between atomic operations and memory alignment ?
I read from UTLK that "an unaligned memory access is not atomic"
please explain me , I am not able to get the relationship between memory alignment and atomicity of the operation.
Not all CPUs support unaligned memory access, such an access may cause a fault which needs to be fixed by the kernel...
There's a more subtle issue - an unaligned access can be split across a cache line boundary, requiring 2 separate memory accesses to do the read or write. This can result in CPU A fetching the first half of the variable, CPU B updating both halves, and then A fetching the second half of the now updated variable.. This can bite you even on CPUs that support unaligned accesses.