Hi all, While going through the BCM 57712 code i found the following. /* [RW 32] reset reg#2; rite/read one = the specific block is out of reset; * write/read zero = the specific block is in reset; addr 0-wr- the write * value will be written to the register; addr 1-set - one will be written * to all the bits that have the value of one in the data written (bits that * have the value of zero will not be change) ; addr 2-clear - zero will be * written to all the bits that have the value of one in the data written * (bits that have the value of zero will not be change); addr 3-ignore; * read ignore from all addr except addr 00; inside order of the bits is: * [0] rst_bmac0; [1] rst_bmac1; [2] rst_emac0; [3] rst_emac1; [4] * rst_grc(global register); [5] rst_mcp_n_reset_reg_hard_core (global * register); [6] rst_mcp_n_hard_core_rst_b(global register); [7] * rst_mcp_n_reset_cmn_cpu(global register); [8] * rst_mcp_n_reset_cmn_core(global register); [9] rst_rbcn; [10] rst_dbg; * [11] rst_misc_core(global register); [12] rst_dbue (UART)(global * register); [13] Pci_resetmdio_n(global register); [14] * rst_emac0_hard_core; [15] rst_emac1_hard_core; 16] rst_pxp_rq_rd_wr; 17] * rst_atc; 18] rst_cnig; 19] rst_pglc (global register); 31:20] reserved */ Here is what i understand and here is what i need help with! What I understand, REG2 has 20 bits and what each of those bits signify, I understand. I also understand that if I read/write 1, it means that particular block has finished reset. If I read/write 0, it means that particular block has completed reset. But what is this addr 1-set, addr 2- clear and friends?