Hello. Please do not hesitate to let me know if this must be posted elsewhere. I have been trying to understand the code that sets up the MMU. I do have a fair understanding of the way MMU is meant to be setup, but something in the kernel code is tripping me. The code that kickstarts setting up of MMU is __create_page_tables in /arch/arm/kernel/head.S. This code is position independent. It basically - Reserves 16KB of memory in RAM just before the start of the uncompressed kernel. - Clears the 16KB meant to serve as L1 lookup table containing 4096 entries - Creates a section entry in L1 table for the kernel code to be mapped into physical memory It is this creation of section entry code that is puzzling me. The index used to program this entry is based on physical address of the kernel base. The way it ought to work is this. When the CPU issues a virtual address, the top bits are used as an index into this L1 table and then through a couple of table walk throughs, the physical address is arrived at. So the index used to program the L1 table ought to have been Now look at this code. __create_page_tables: pgtbl r4 @ page table address /* * Clear the 16K level 1 swapper page table */ mov r0, r4 @r0 = 0x80004000 mov r3, #0 add r6, r0, #0x4000 @r6 = 0x80008000 1: str r3, [r0], #4 str r3, [r0], #4 str r3, [r0], #4 str r3, [r0], #4 teq r0, r6 bne 1b /* r10 contains proc_info pointer */ ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags /* * Create identity mapping to cater for __enable_mmu. * This identity mapping will be removed by paging_init(). */ adr r0, __enable_mmu_loc ldmia r0, {r3, r5, r6} sub r0, r0, r3 @ virt->phys offset add r5, r5, r0 @ phys __enable_mmu add r6, r6, r0 @ phys __enable_mmu_end mov r5, r5, lsr #20 mov r6, r6, lsr #20 1: orr r3, r7, r5, lsl #20 @ flags + kernel base str r3, [r4, r5, lsl #2] @ identity mapping teq r5, r6 addne r5, r5, #1 @ next section bne 1b The 2 lines above 1: orr r3, r7, r5, lsl #20 @ flags + kernel base ==> Correct str r3, [r4, r5, lsl #2] @ identity mapping ==> ?? create a section entry using index based on physical address. Am I missing something here? Regards, Prakash