-----Original Message----- From: kernelnewbies-bounces@kernelnewbies.org [mailto:kernelnewbies- bounces@kernelnewbies.org] On Behalf Of kernelnewbies- request@kernelnewbies.org Sent: Thursday, April 12, 2012 3:47 PM To: kernelnewbies@kernelnewbies.org Subject: Kernelnewbies Digest, Vol 17, Issue 15
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Today's Topics:
1. Re: IRQs and memory consistency (Christopher Harvey) 2. identity mapped paging (Vaibhav Jain) 3. System Tap help (V.Ravikumar) 4. Re: System Tap help (V.Ravikumar) 5. Issue in uncompressing zImage (KARTHIK SEKURU) 6. [RFC]Something wrong with my module (harryxiyou)
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Message: 1 Date: Wed, 11 Apr 2012 15:14:44 -0500 From: Christopher Harvey <chris@basementcode.com> Subject: Re: IRQs and memory consistency To: Wink Saville <wink@saville.com> Cc: kernelnewbies@kernelnewbies.org Message-ID: <a6554b231600d032628d59f975476e13@basementcode.com> Content-Type: text/plain; charset=UTF-8; format=flowed
On 11.04.2012 10:35, Wink Saville wrote:
Do you have a read barrier in the IRQ?
Ah, no I don't.
See "SMP BARRIER PAIRING" in:
http://www.kernel.org/doc/Documentation/memory-barriers.txt [3]
I saw that but only skimmed it.
I'll let the mailing list know if it worked when I get a chance to try it.
thanks, -Chris
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Message: 2 Date: Wed, 11 Apr 2012 14:22:29 -0700 From: Vaibhav Jain <vjoss197@gmail.com> Subject: identity mapped paging To: kernelnewbies@kernelnewbies.org Message-ID: <CAKuUYSy-j5HogDpg0- 9j5RrVSPbNObBDKqafBEPgCTjHO2twFA@mail.gmail.com> Content-Type: text/plain; charset="iso-8859-1"
I am not clear about the use of identity mapped paging while paging is being enabled by the operating system. Also I don't understand at what point are the identity mappings no longer useful.According to this article http://geezer.osdevbrasil.net/osd/mem/index.htm#identity - "The page table entries used to identity-map kernel memory can be deleted once paging and virtual addresses are enabled." Can somebody please explain?
Identity mapping is when VA(Virt Address)=PA(Physical address). So basically when you set up your page tables you need to make sure they map identically. This is very easily done if you consider each 4KB block as a page beginning from location 0 upto whatever you've found to be the highest memory available either thru BIOS or GRUB. Remember that while setting up your PTEs and PDE every address is a physical one. So if you thought that your kernel would be linked initially to a higher VA since you would remap it to a lower memory physically then that would be WRONG!. Without PTEs and PDEs installed don't do that!. Why would you want it? Well for a simple reason, when your kernel starts to boot there's no translator,(No PTEs/PDEs and the Paging Enabled bit of processor is also cleared AFAIK just after the BIOS is done), yet since you've not enabled your processor for that but you'll be doing that in a moment. So let's say you made your kernel to be linked to higher VA like 3Gigs. Now the addresses would be generated beginning 3Gigs however you still don't have the Page tables installed since your kernel just started. So in that case the address is the physical address. And if you've not loaded your kernel beginning 3Gigs then it would definitely come crashing down. To avoid the crash in case you made your kernel to link to higher half of the memory, you can use GDT trick since segmentation is always on and you can make the overflow of the address addition to translate to a lower physical memory even if paging is not enabled yet. Thus it is possible to load the kernel at lower memory addresses while the linkage would be for higher VMA. And once your PTEs/PGD are enabled then you can use those instead of the GDT trick. Here's a link to that http://wiki.osdev.org/Higher_Half_With_GDT
Thanks Vaibhav Jain