Architecture specific implementations for tickless kernel

Hi, I am developing a BSP for a ARM Cortex-M3 (no MMU) based board. In order to have tickless kernel and deferrable timers, what are the architecture specific implementations. Is the clocksource and clockevent data structures enough? How to hook those timers to the tickless implementation of the kernel/timer.c. Can some one point out any examples that already have this feature enabled and also in the kernel tree. And also, are clocksoure and clockevents dependent on each other? I see in some platforms, that they have used 2 different timers for the above. If it can be used so, which ties up the clocksource and clockevent? Thanks in advance neo