Id like to build 2 modules (with different names) from a single source file, with 2nd being dependent on the 1st. Specifically, Ive got: lib/test_dynamic_debug.c I want A: lib/test_dynamic_debug.ko B: lib/test_dynamic_debug_submod.ko I expect that the code just needs an #ifdef #else #endif block to clearly put the dependor & dependee elements next to each other. My question is how to do this in the Makefile ? this does most of it --- a/lib/Makefile +++ b/lib/Makefile @@ -78,7 +78,8 @@ obj-$(CONFIG_TEST_SORT) += test_sort.o obj-$(CONFIG_TEST_USER_COPY) += test_user_copy.o obj-$(CONFIG_TEST_STATIC_KEYS) += test_static_keys.o obj-$(CONFIG_TEST_STATIC_KEYS) += test_static_key_base.o -obj-$(CONFIG_TEST_DYNAMIC_DEBUG) += test_dynamic_debug.o +obj-$(CONFIG_TEST_DYNAMIC_DEBUG) += test_dynamic_debug.o test_dynamic_debug_submod.o +CFLAGS_test_dynamic_debug_submod.o += -DTEST_DYNAMIC_DEBUG_SUBMOD obj-$(CONFIG_TEST_PRINTF) += test_printf.o but how do I tell it the 2nd target ? make[2]: *** No rule to make target 'lib/test_dynamic_debug_submod.o', needed by 'lib/modules.order'. Stop. make[1]: *** [/home/jimc/projects/lx/wk-test/scripts/Makefile.build:500: lib] Error 2 CFLAGS_test_dynamic_debug_submod.o += -\ DTEST_DYNAMIC_DEBUG_SUBMOD A.ko: