April 2012 - kernelnewbies@kernelnewbies.org - Kernelnewbies Mailing Lists

BUG: scheduling while atomic
by Arun KS April 18, 2012

April 18, 2012

Hello Guys, System is working normal after this BUG. PC is at 0x400b4614, probably a mmaped address. Just wondering how can this BUG happen when a process is running in user space. Can it be something like this 1) enter to kernel from userspace through some system call. 2) kernel disables the interrupt and return to user space. 3) and now it can happen in user space? Any thoughts? shell@android: # ls device[ 40.603515] BUG: scheduling while atomic: Binder Thread #/1355/0x00010003 [ 40.610290] Modules linked in: [ 40.613342] [ 40.614837] Pid: 1355, comm: Binder Thread # [ 40.619506] CPU: 0 Tainted: G W (3.0.15+ #174) [ 40.625061] PC is at 0x400b4614 [ 40.628173] LR is at 0x408d83c9 [ 40.631317] pc : [<400b4614>] lr : [<408d83c9>] psr: 40000010 [ 40.631317] sp : 50551918 ip : 4092d1c0 fp : 505519a4 [ 40.642730] r10: 50551974 r9 : 5016de28 r8 : 1f600009 [ 40.647949] r7 : 00000000 r6 : 00000000 r5 : 5055194c r4 : 00f09f90 [ 40.654418] r3 : 40931c58 r2 : 00000000 r1 : 00f09f90 r0 : 00000006 [ 40.660919] Flags: nZcv IRQs on FIQs on Mode USER_32 ISA ARM Segment user [ 40.668121] Control: 10c53c7d Table: 91184059 DAC: 00000015 shell@android: # shell@android: # shell@android: #

3 6

Re: How does the driver initialize corresponding with several same devices ?
by Philipp Ittershagen April 18, 2012

April 18, 2012

On Wed, Apr 18, 2012 at 04:32:12PM +0530, anish singh wrote: > On Wed, Apr 18, 2012 at 4:18 PM, Philipp Ittershagen > <p.ittershagen(a)googlemail.com> wrote: > > On Wed, Apr 18, 2012 at 05:16:01PM +0800, Li Haifeng wrote: > >> I make a driver module and built in the kernel. There are three devices use > >> the same driver on the hardware platform. To use each device, the probe > >> function of the driver module should be probed. So, the driver module is > >> registered in the kernel. > >> > >> My question is, how times should the probe function of the driver be called > >> and create nodes in devfs to corresponding with the three devices? > > > > It depends on what your architecture supports. If you have support for device > > tree, your entry in the device tree will make the subsystem call your probe > > function for each device it finds. You can then check the `compatible` entry > > of the device node and your driver is then able to register itself to the > > kernel subsystem. > Without device tree what would be your answer as i guess device > tree has come recently in picture but not sure. Let me rephrase your question and see if I understand it correctly. You have a probe function which already gets called for each device in your platform and you want to know how to make each device accessible in userspace (using i.e. devfs nodes) ? Greetings, Philipp

3 2

How does the driver initialize corresponding with several same devices ?
by Li Haifeng April 18, 2012

April 18, 2012

I make a driver module and built in the kernel. There are three devices use the same driver on the hardware platform. To use each device, the probe function of the driver module should be probed. So, the driver module is registered in the kernel. My question is, how times should the probe function of the driver be called and create nodes in devfs to corresponding with the three devices?

3 3

Re: Kernelnewbies Digest, Vol 17, Issue 27
by Rajasekhar Pulluru April 18, 2012

April 18, 2012

Hi Arun, This could be a bug in your kernel code servicing your binder process. Your kernel code or driver has invoked schedule/sleep from a place that's not allowed to sleep/block. One possible case for this bug to occur could be: you are executing an interrupt handler with interrupts disabled, ( and also had acquired spin lock) and tried to invoke schedule/sleep. Thanks & Regards, Rajasekhar > Date: Wed, 18 Apr 2012 12:14:43 +0530 > From: Arun KS <getarunks(a)gmail.com> > Subject: BUG: scheduling while atomic > To: kernelnewbies(a)kernelnewbies.org > Message-ID: > <CABOM9ZoPLrhpGfqv-JUkPM76CqrAYKOukS4XyPP5NM4Y4%3DsR1w(a)mail.gmail.com> > Content-Type: text/plain; charset="iso-8859-1" > > Hello Guys, > > System is working normal after this BUG. > PC is at 0x400b4614, probably a mmaped address. > > Just wondering how can this BUG happen when a process is running in user > space. > > Can it be something like this > 1) enter to kernel from userspace through some system call. > 2) kernel disables the interrupt and return to user space. > 3) and now it can happen in user space? > > Any thoughts? > > shell@android: # ls > device[ 40.603515] BUG: scheduling while atomic: Binder Thread > #/1355/0x00010003 > [ 40.610290] Modules linked in: > [ 40.613342] > [ 40.614837] Pid: 1355, comm: Binder Thread # > [ 40.619506] CPU: 0 Tainted: G W (3.0.15+ #174) > [ 40.625061] PC is at 0x400b4614 > [ 40.628173] LR is at 0x408d83c9 > [ 40.631317] pc : [<400b4614>] lr : [<408d83c9>] psr: 40000010 > [ 40.631317] sp : 50551918 ip : 4092d1c0 fp : 505519a4 > [ 40.642730] r10: 50551974 r9 : 5016de28 r8 : 1f600009 > [ 40.647949] r7 : 00000000 r6 : 00000000 r5 : 5055194c r4 : 00f09f90 > [ 40.654418] r3 : 40931c58 r2 : 00000000 r1 : 00f09f90 r0 : 00000006 > [ 40.660919] Flags: nZcv IRQs on FIQs on Mode USER_32 ISA ARM > Segment user > [ 40.668121] Control: 10c53c7d Table: 91184059 DAC: 00000015 > > shell@android: # > shell@android: # > shell@android: # >

1 0

Re: BUG: scheduling while atomic
by Arun KS April 18, 2012

April 18, 2012

Hi Srivatsa, On Wed, Apr 18, 2012 at 1:57 PM, Srivatsa S. Bhat < srivatsa.bhat(a)linux.vnet.ibm.com> wrote: > On 04/18/2012 01:38 PM, Arun KS wrote: > > > Hi Dave, > > > > Thanks for your reply. > > > > On Wed, Apr 18, 2012 at 1:01 PM, Dave Hylands <dhylands(a)gmail.com > > <mailto:dhylands@gmail.com>> wrote: > > > > Hi Arun, > > > > On Tue, Apr 17, 2012 at 11:44 PM, Arun KS <getarunks(a)gmail.com > > <mailto:getarunks@gmail.com>> wrote: > > > > > > Hello Guys, > > > > > > System is working normal after this BUG. > > > PC is at 0x400b4614, probably a mmaped address. > > > > > > Just wondering how can this BUG happen when a process is running > > in user > > > space. > > > > > > Can it be something like this > > > 1) enter to kernel from userspace through some system call. > > > 2) kernel disables the interrupt and return to user space. > > > > Don't do that > > > > > > I don't do that. This scenario mentioned is a just a wild guess. > > > > > > > 3) and now it can happen in user space? > > > > Because something in userspace made a blocking call which would cause > > a context switch to occur and your driver erroneously left interrupts > > disabled. > > > > In that case, my system should have been unstable afterwards if > > interrupts are left disabled. But that is not happening. > > > > If we return to user space with interrupts disabled, can we switch back > > again to kernel using a system cal(because interrupts are already > disabled)? > > > > > Depends on how many CPUs you have - AFAICS the "interrupts disabled" > discussion above applies to a single CPU.. so if you have other CPUs on > your > system, you could probably use the system for a little more time. > > > Hmm.. I have uniprocessor. > > There is a simple way to check if interrupts are indeed disabled as > hypothesised: turn on the hard-lockup detector (See > Documentation/lockup-watchdogs.txt for details on what it is and what > config options you have to enable). You can even turn on the soft-lockup > detector and see what you get. Setting the option to panic on hard-lockup/ > soft-lockup/hung tasks would be even better, to debug the issue. > Thanks for the pointers. I ll try this out. Arun > > Regards, > Srivatsa S. Bhat > >

1 0

Hung Task Timeout
by mani April 18, 2012

April 18, 2012

Hi All, How kernel scheduler treats task's TASK_UNINTERRUPTIBLE & TASK_INTERREPTIBLE states ? Actually in my case i have created a kernel thread and it is waiting on an event as per below :- wait_event(queue, flag); in the above condition it gives me hung task timeout dump as it puts the task in TASK_UNINTERRUPTIBLE state whereas if i change the function call to wait_event_interruptible(queue, flag); It works fine as the task is in TASK_INTERREPTIBLE state I have checked in the kernel [kernel/hung_task.c ] check_hung_task() It says that /* * Ok, the task did not get scheduled for more than 2 minutes, * complain: */ So is that means that TASK_UNINTERRUPTIBLE will not get schedule by the scheduler ? Can anyone give the detail information what's going on in backyard ? Thanks

2 5

RE: identity mapped paging (Vaibhav Jain)
by Pranay Kumar Srivastava April 18, 2012

April 18, 2012

> -----Original Message----- > From: kernelnewbies-bounces(a)kernelnewbies.org [mailto:kernelnewbies- > bounces(a)kernelnewbies.org] On Behalf Of kernelnewbies- > request(a)kernelnewbies.org > Sent: Thursday, April 12, 2012 3:47 PM > To: kernelnewbies(a)kernelnewbies.org > Subject: Kernelnewbies Digest, Vol 17, Issue 15 > > Send Kernelnewbies mailing list submissions to > kernelnewbies(a)kernelnewbies.org > > To subscribe or unsubscribe via the World Wide Web, visit > http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies > or, via email, send a message with subject or body 'help' to > kernelnewbies-request(a)kernelnewbies.org > > You can reach the person managing the list at > kernelnewbies-owner(a)kernelnewbies.org > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of Kernelnewbies digest..." > > > Today's Topics: > > 1. Re: IRQs and memory consistency (Christopher Harvey) > 2. identity mapped paging (Vaibhav Jain) > 3. System Tap help (V.Ravikumar) > 4. Re: System Tap help (V.Ravikumar) > 5. Issue in uncompressing zImage (KARTHIK SEKURU) > 6. [RFC]Something wrong with my module (harryxiyou) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Wed, 11 Apr 2012 15:14:44 -0500 > From: Christopher Harvey <chris(a)basementcode.com> > Subject: Re: IRQs and memory consistency > To: Wink Saville <wink(a)saville.com> > Cc: kernelnewbies(a)kernelnewbies.org > Message-ID: <a6554b231600d032628d59f975476e13(a)basementcode.com> > Content-Type: text/plain; charset=UTF-8; format=flowed > > On 11.04.2012 10:35, Wink Saville wrote: > > Do you have a read barrier in the IRQ? > > Ah, no I don't. > > > See "SMP BARRIER PAIRING" in: > > > > http://www.kernel.org/doc/Documentation/memory-barriers.txt [3] > > I saw that but only skimmed it. > > I'll let the mailing list know if it worked when I get a chance to try > it. > > thanks, > -Chris > > > > > ------------------------------ > > Message: 2 > Date: Wed, 11 Apr 2012 14:22:29 -0700 > From: Vaibhav Jain <vjoss197(a)gmail.com> > Subject: identity mapped paging > To: kernelnewbies(a)kernelnewbies.org > Message-ID: > <CAKuUYSy-j5HogDpg0- > 9j5RrVSPbNObBDKqafBEPgCTjHO2twFA(a)mail.gmail.com> > Content-Type: text/plain; charset="iso-8859-1" > > I am not clear about the use of identity mapped paging while paging is > being enabled by the operating system. Also I don't understand at what > point are the > identity mappings no longer useful.According to this article > http://geezer.osdevbrasil.net/osd/mem/index.htm#identity - "The page > table > entries used to identity-map kernel memory can be deleted once paging > and > virtual addresses are enabled." Can somebody please explain? > Identity mapping is when VA(Virt Address)=PA(Physical address). So basically when you set up your page tables you need to make sure they map identically. This is very easily done if you consider each 4KB block as a page beginning from location 0 upto whatever you've found to be the highest memory available either thru BIOS or GRUB. Remember that while setting up your PTEs and PDE every address is a physical one. So if you thought that your kernel would be linked initially to a higher VA since you would remap it to a lower memory physically then that would be WRONG!. Without PTEs and PDEs installed don't do that!. Why would you want it? Well for a simple reason, when your kernel starts to boot there's no translator,(No PTEs/PDEs and the Paging Enabled bit of processor is also cleared AFAIK just after the BIOS is done), yet since you've not enabled your processor for that but you'll be doing that in a moment. So let's say you made your kernel to be linked to higher VA like 3Gigs. Now the addresses would be generated beginning 3Gigs however you still don't have the Page tables installed since your kernel just started. So in that case the address is the physical address. And if you've not loaded your kernel beginning 3Gigs then it would definitely come crashing down. To avoid the crash in case you made your kernel to link to higher half of the memory, you can use GDT trick since segmentation is always on and you can make the overflow of the address addition to translate to a lower physical memory even if paging is not enabled yet. Thus it is possible to load the kernel at lower memory addresses while the linkage would be for higher VMA. And once your PTEs/PGD are enabled then you can use those instead of the GDT trick. Here's a link to that http://wiki.osdev.org/Higher_Half_With_GDT > Thanks > Vaibhav Jain >

3 6

Query regarding ZRELADDR, ZTEXTADDR and zImage.
by KARTHIK SEKURU April 17, 2012

April 17, 2012

Hi, I'm doing kernel porting to arm926 based FPGA board,very minimal setup (uart + timer only) Below are the details #define PLAT_PHYS_OFFSET 0x80000000 (with 128 MB SDRAM) #define CONFIG_PAGE_OFFSET 0xc0000000 Physical memory : 128MB (0x80000000 to 88000000) ZRELADDR = 0x80008000 PARAMS_PHYS = 0x80000100 INITRD_PHYS = 0x80800000 Kernel cmd line : mem=32M console=ttySAC0,115200 root=/dev/ram0 rootfstype=cramfs init=/linuxrc initrd=0x80800000,8M user_debug=31 I am not using u-boot and doing all the required initializations through trace32 cmm script. Through trace32 I am loading the zImage at 0x80008000.After this I am getting the following error.. *Uncompressing Linux...* * * *uncompression error* * * * -- System halted* My doubt is … ZRELADDR in “Makefile.boot” is set to 0x80008000,i.e the start address of the “decompressed zImage”.. And through cmm script I am also loading the “compressed zImage” at the same location 0x80008000. Am I mentioning the source address and destination address as same.i.e the compressed zImage and decompressed zImage address are same? Is that OK? ZTEXTADDR: Start address of decompressor. Is it the address where i should load "compressed zImage". ?? The “compressed zImage” is decompressed via the function decompress_kernel(); Void decompress_kernel() { … … putstr("Uncompressing Linux..."); ret = do_decompress(input_data, input_data_end - input_data, output_data, error); … … } I understand that the arguments going to the function do_decompress() ., input_data,input_data_end and output_data are related to zImage address. Please help me in getting clear understanding about these arguments ?? What does they mean exactly ?? Kindly help me in resolving this uncompression error. Karthik.

2 1

Re: identity mapped paging (Vaibhav Jain)
by Liu Zhiyou April 17, 2012

April 17, 2012

? 2012?04?17? 18:37, Vaibhav Jain ??: > > > On Fri, Apr 13, 2012 at 2:15 AM, Vaibhav Jain <vjoss197(a)gmail.com > <mailto:vjoss197@gmail.com>> wrote: > > > > > I am not clear about the use of identity mapped paging while > paging is > > being enabled by the operating system. Also I don't > understand at what > > point are the > > identity mappings no longer useful.According to this article > > http://geezer.osdevbrasil.net/osd/mem/index.htm#identity - > "The page > > table > > entries used to identity-map kernel memory can be deleted > once paging > > and > > virtual addresses are enabled." Can somebody please explain? > > > > Identity mapping is when VA(Virt Address)=PA(Physical address). > > So basically when you set up your page tables you need to make > sure they map identically. This is very easily done if you > consider each 4KB block as a page beginning from location 0 > upto whatever you've found to be the highest memory available > either thru BIOS or GRUB. > > Remember that while setting up your PTEs and PDE every address > is a physical one. So if you thought that your kernel would be > linked initially to a higher VA since you would remap it to a > lower memory physically then that would be WRONG!. Without > PTEs and PDEs installed don't do that!. > > Why would you want it? Well for a simple reason, when your > kernel starts to boot there's no translator,(No PTEs/PDEs and > the Paging Enabled bit of processor is also cleared AFAIK just > after the BIOS is done), yet since you've not enabled your > processor for that but you'll be doing that in a moment. > > So let's say you made your kernel to be linked to higher VA > like 3Gigs. Now the addresses would be generated beginning > 3Gigs however you still don't have the Page tables installed > since your kernel just started. So in that case the address is > the physical address. And if you've not loaded your kernel > beginning 3Gigs then it would definitely come crashing down. > > To avoid the crash in case you made your kernel to link to > higher half of the memory, you can use GDT trick since > segmentation is always on and you can make the overflow of the > address addition to translate to a lower physical memory even > if paging is not enabled yet. Thus it is possible to load the > kernel at lower memory addresses while the linkage would be > for higher VMA. And once your PTEs/PGD are enabled then you > can use those instead of the GDT trick. > > Here's a link to that http://wiki.osdev.org/Higher_Half_With_GDT > > > Thanks > > Vaibhav Jain > > > > Hi, > > Thanks for replying but I am still confused. I continued reading > about this thing and what > I have understood is the following : > After the kernel executes the instruction to enable paging the > instruction pointer will contain the > address of the next instruction which will now be treated as a > virtual address. So for the next instruction to be executed > the page table should map this address to itself. > Please correct me if I am wrong. > I am confused by the point about linking the kernel to higher > address. Could you please put that in a step by step manner > to make it clear what happens before paging is enabled and what > happens after that. > Also, please explain at what point during the execution of kernel > code are the identity-mapped addresses no longer useful ? > > > > > Thanks > Vaibhav > > Hi, > I am somewhat understanding your point. But I have some other queries > now in my mind. > If the kernel is linked to 3Gigs is there a way other than the GDT trick.? > In fact I am wondering that if the kernel is linked to 3Gigs and Grub > loads it at 1MB physical, how will even the first instruction of kernel > execute ? I mean if all the address generated by kernel are above 3 > Gigs and paging is not enabled how will it start > running ? > Thanks > Vaibhav Jain > > > _______________________________________________ > Kernelnewbies mailing list > Kernelnewbies(a)kernelnewbies.org > http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies Vaibhav, Kernel want to be linked in 3Gigs address (Virtually, of course), but not every machine has so many memory. So at the very beginning GRUB just load it into a lower address like 1MB. After the loading, GRUB set eip/rip to the physical address where kernel loaded. From then on, kernel code's running. And in that moment the GDT/Paging trick are not turned on so kernel will live with the world with only having physical address. But it's still Okay. In fact, because CPU simply add eip/rip rather than reseting it after one instrution is finished. So as long as the code not using instruction like ljmp(long jump, which will reset segment register(CS) and eip/rip), the code will run fine. So kernel setup a GDT, enable the segment transition, then using the ljmp to reset CS and eip/rip. From then on, kernel looks itself lives in the right VA. Best, Lewis Lau

1 0

Re: identity mapped paging (Vaibhav Jain)
by Liu Zhiyou April 17, 2012

April 17, 2012

Hi, I am not very sure what you guys are talking about. I guess we are discussing the moment enabling paging. On 2012-4-15 10:49, Vladimir Murzin wrote: > On Fri, Apr 13, 2012 at 02:15:20AM -0700, Vaibhav Jain wrote: >>>> I am not clear about the use of identity mapped paging while paging is >>>> being enabled by the operating system. Also I don't understand at what >>>> point are the >>>> identity mappings no longer useful.According to this article >>>> http://geezer.osdevbrasil.net/osd/mem/index.htm#identity - "The page >>>> table >>>> entries used to identity-map kernel memory can be deleted once paging >>>> and >>>> virtual addresses are enabled." Can somebody please explain? >>>> >>> Identity mapping is when VA(Virt Address)=PA(Physical address). >>> >>> So basically when you set up your page tables you need to make sure they >>> map identically. This is very easily done if you consider each 4KB block as >>> a page beginning from location 0 upto whatever you've found to be the >>> highest memory available either thru BIOS or GRUB. >>> >>> Remember that while setting up your PTEs and PDE every address is a >>> physical one. So if you thought that your kernel would be linked initially >>> to a higher VA since you would remap it to a lower memory physically then >>> that would be WRONG!. Without PTEs and PDEs installed don't do that!. >>> >>> Why would you want it? Well for a simple reason, when your kernel starts >>> to boot there's no translator,(No PTEs/PDEs and the Paging Enabled bit of >>> processor is also cleared AFAIK just after the BIOS is done), yet since >>> you've not enabled your processor for that but you'll be doing that in a >>> moment. >>> >>> So let's say you made your kernel to be linked to higher VA like 3Gigs. >>> Now the addresses would be generated beginning 3Gigs however you still >>> don't have the Page tables installed since your kernel just started. So in >>> that case the address is the physical address. And if you've not loaded >>> your kernel beginning 3Gigs then it would definitely come crashing down. >>> >>> To avoid the crash in case you made your kernel to link to higher half of >>> the memory, you can use GDT trick since segmentation is always on and you >>> can make the overflow of the address addition to translate to a lower >>> physical memory even if paging is not enabled yet. Thus it is possible to >>> load the kernel at lower memory addresses while the linkage would be for >>> higher VMA. And once your PTEs/PGD are enabled then you can use those >>> instead of the GDT trick. >>> >>> Here's a link to thathttp://wiki.osdev.org/Higher_Half_With_GDT >>> >>>> Thanks >>>> Vaibhav Jain >> Hi, >> >> Thanks for replying but I am still confused. I continued reading about this >> thing and what >> I have understood is the following : >> After the kernel executes the instruction to enable paging the instruction >> pointer will contain the >> address of the next instruction which will now be treated as a virtual >> address. So for the next instruction to be executed >> the page table should map this address to itself. In this moment, the segment transition is still on, and physical address is got from Virtual Address ------------------> Linear Address -----------------------> Physical Address. Segment Paging Without identical mapping in LA[0]. PA = VA - 2* (kernel base address). With identical mapping in LA[0], PA = VA - (kernel base address). It is just what we want. And with this mapping, we will disable the Segment transition by setting new segment offset to 0. After that, the PDE and PTE we seted for linear address works and we don't need the identical mapping anymore. Hope it heles. >> Please correct me if I am wrong. >> I am confused by the point about linking the kernel to higher address. >> Could you please put that in a step by step manner >> to make it clear what happens before paging is enabled and what happens >> after that. >> Also, please explain at what point during the execution of kernel code are >> the identity-mapped addresses no longer useful ? >> >> >> >> >> Thanks >> Vaibhav >> _______________________________________________ >> Kernelnewbies mailing list >> Kernelnewbies(a)kernelnewbies.org >> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies > Hi > > May be notes in [1] make it a bit clear ;) > > [1]http://pankaj-techstuff.blogspot.com/2007/12/initialization-of-arm-mmu-in… > > Best wishes > Vladimir Murzin > > _______________________________________________ > Kernelnewbies mailing list > Kernelnewbies(a)kernelnewbies.org > http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies Regards, Lewis Lau

1 0