arm64: Question about barriers with the mmu off
valdis.kletnieks at vt.edu
Mon Nov 16 21:14:28 EST 2020
On Mon, 16 Nov 2020 20:58:52 +0900, Wonhyuk Yang said:
> str w0, [x1]
So we dirtied the cache line.
> dmb sys
> dc ivac, x1 // Invalidate potentially stale cache line
So we invalidate it.
> Is there any problem, if the dc operation precedes the store operation?
If you swap them, you get...
dc ivac,x1 // invalidate a cache line that's probably OK
str w0,[x1 // and now we do a store that leaves a possibly stale cache line
In other words, if you swap them you may leave an un-invalidated
stale cache line.
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