Query about PCI base address registers
ulka.vaze at l2it.com
Thu Dec 12 07:23:31 EST 2013
In PCI configuration space there are 6 registers BAR0-5 which can
hold the ioaddress or memory address used by card.
However my question is - how will we know which BAR register contain
ioaddress and which contain memory ? and How many of them contain the
addresses. I mean shall we start reading from bar0 to 5 all to find it
If card has 3 ports and one memory region will it be in bar0 or bar1 or bar2 ?
Second is on PCI card we set it as bus master for DMA in probe
function and also allocates buffer. So when is DMA actually initiated
by it ?
Please can anybody clarify.
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