A question on endpoint_test code in the linux source by Kishon Vijay Abraham I.
Hello linux experts, I was analyzing drivers/misc/pci_endpoint_test.c (linux-5.15.68) It uses a miscdev and when the driver receives PCITEST_WRITE command using ioctl(line 726 in the link below) from the user, the driver sets registers of the endpoint device and writes COMMAND_READ at register PCI_ENDPOINT_TEST_COMMAND (https://elixir.bootlin.com/linux/v5.15.68/source/drivers/misc/pci_endpoint_ test.c#L553 ). This seems to be setting DMA paramaters (source DMA address and size) and triggering DMA. The driver then waits for completion and I can see the interrupt service routine completes the completion(test->irq_raised). I guess the endpoint device should actually do the DMA-read (when told to use DMA) or read the data to itself(I don't know where it is) and send interrupt to the host(using msix or msi or intx). The code was written by "Kishon Vijay Abraham I" and I know it is supposed to be run with drivers/pci/endpoint/functions/pci-epf-test.c (https://elixir.bootlin.com/linux/v5.15.68/source/drivers/pci/endpoint/funct ions/pci-epf-test.c) in the endpoint side. And how to use this endpoint framework test is shown in https://docs.kernel.org/PCI/endpoint/pci-test-howto.html . But I cannot find where the actual DMA and sending interrupt is occurring in the endpoint side source code when the registers at set. Am I supposed to be running this code with some real hardware?(as listed in the pci_device_id in the hostside pci_endpoint_test.c driver?) Where can I find the corresponding (acting on the register triggering above) action in the endpoint side? If you have once seen these codes and send me any hint or suggestion, I'll be grateful. Thank you. Best regards, Chan Kim
Oh, I right after I sent my previous email, I realized how it's working. The endpoint test driver (drivers/pci/endpoint/functions/pci-epf-test.c) queues delayed work after linkup or binding (binding epc and epf), or after processing the delayed work (re-queues). And in the delayed work performs the function "pci_epf_test_cmd_handler" and there it reads the command register and performs various actions including DMA read for the 'write test from the RC' that I mentioned in my previous email. After it performs the command, it sends interrupt to the host using rais_irq function. I had analyzed this pci-epf-test.c before and right after sending my question I realized how it's working after searching 'raise_irq' in the endpoint test code. Thank you. Best regards, Chan Kim
-----Original Message----- From: Chan Kim <ckim@etri.re.kr> Sent: Thursday, September 14, 2023 2:39 PM To: kernelnewbies@kernelnewbies.org Subject: A question on endpoint_test code in the linux source by Kishon Vijay Abraham I.
Hello linux experts,
I was analyzing drivers/misc/pci_endpoint_test.c (linux-5.15.68) It uses a miscdev and when the driver receives PCITEST_WRITE command using ioctl(line 726 in the link below) from the user, the driver sets registers of the endpoint device and writes COMMAND_READ at register PCI_ENDPOINT_TEST_COMMAND (https://elixir.bootlin.com/linux/v5.15.68/source/drivers/misc/pci_endpoin t_ test.c#L553 ). This seems to be setting DMA paramaters (source DMA address and size) and triggering DMA. The driver then waits for completion and I can see the interrupt service routine completes the completion(test->irq_raised). I guess the endpoint device should actually do the DMA-read (when told to use DMA) or read the data to itself(I don't know where it is) and send interrupt to the host(using msix or msi or intx).
The code was written by "Kishon Vijay Abraham I" and I know it is supposed to be run with drivers/pci/endpoint/functions/pci-epf-test.c (https://elixir.bootlin.com/linux/v5.15.68/source/drivers/pci/endpoint/fun ct ions/pci-epf-test.c) in the endpoint side. And how to use this endpoint framework test is shown in https://docs.kernel.org/PCI/endpoint/pci-test- howto.html . But I cannot find where the actual DMA and sending interrupt is occurring in the endpoint side source code when the registers at set. Am I supposed to be running this code with some real hardware?(as listed in the pci_device_id in the hostside pci_endpoint_test.c driver?) Where can I find the corresponding (acting on the register triggering above) action in the endpoint side?
If you have once seen these codes and send me any hint or suggestion, I'll be grateful. Thank you.
Best regards, Chan Kim
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