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<p>So after some more looking around in the code, I think the
workflow is quite a bit different than what I thought in the
previous mail. I think I am supposed to allocate hdlc device using
`alloc_hdlcdev` in the `serdev->probe` and then implementing
`hdlc->xmit` to send data over UART. <br>
</p>
<p>But well, I am not sure how to create an HDLC frame? Is there a
helper that creates HDLC frame skbuff for me? Or maybe the hdlc
implementation is simply not designed to be used for Asynchronous
framing [1]. It would be great if someone could explain how to use
this HDLC module or point to some resource I might have missed.<br>
</p>
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</p>
<p>Ayush Singh<br>
</p>
<p><br>
</p>
<p>[1]:
<a class="moz-txt-link-freetext" href="https://en.wikipedia.org/wiki/High-Level_Data_Link_Control#Asynchronous_framing">https://en.wikipedia.org/wiki/High-Level_Data_Link_Control#Asynchronous_framing</a><br>
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