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</o:shapelayout></xml><![endif]--></head><body lang=KO link=blue vlink=purple><div class=WordSection1><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Hi JeongHwan,<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>The boot loader (like u-boot) loads the linux Image (in arm64, Image is uncompressed format) on memory and make the pc jump to that address.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>For example, see this code from u-boot.<o:p></o:p></span></p><p class=MsoNormal style='text-indent:15.0pt;word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>msr spsr_el3, \tmp<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'> msr elr_el3, \ep<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'> eret<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>The u-boot program normally runs at el3 and making all the conditions right for starting the linux (there are some requirements),<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Sets elr_el3 (exception link register el3) register with the ep (entry point) value, which physical address like 0x80080000. <o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>When the cpu executes ‘eret’(return from exception), the pc value becomes the value in elr_el3(for example 0x80080000) and it goes into el2.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>In linux head.S, it either remains in el2 or goes down to el1 before jumping to start_kernel().<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>I found the -fno-PIE is needed for ASLR (address space location randomization from kernel 4.xx) and I don’t know exactly what ASLR is. (but I know what KASLR is)<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Anyway, the codes are placed packed or sometimes spaced in kernel virtual addresses by the linker. As you said they are all express in kernel virtual address.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>In my recent experiment , for example _head was in 0xffffffc010080000 but it’s 0x80080000 physically. And ffffffc0103a0320 is just 0x803a0320. <o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>There is this linear relationship for the kernel.(convenient). But the codes and data before the “primary_switched” are accessed using physical address.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>In assembly b (branch, it’s goto. No return) or bl (branch and link, this is like function. It returns to current location using link register) is using relative address when the distance is less then some value.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>(maybe 24 bits?) so there is no problem for using b or bl in the head.S file. But as you saw, when it call primary_switched, ( br x8 ), the address in x8 is pure virtual address for the first time.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Hope that helps.<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Regards,<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'>Chan Kim<o:p></o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'><o:p> </o:p></span></p><p class=MsoNormal style='word-break:break-hangul'><span lang=EN-US style='font-size:10.0pt;font-family:"맑은 고딕"'><o:p> </o:p></span></p><div style='border:none;border-left:solid blue 1.5pt;padding:0cm 0cm 0cm 4.0pt'><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span></b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'> JeongHwan Kim <frog007.kernel.kr@gmail.com> <br><b>Sent:</b> Friday, March 18, 2022 4:41 PM<br><b>To:</b> Chan Kim <ckim@etri.re.kr>; kernelnewbies@kernelnewbies.org<br><b>Subject:</b> Re: Which Page table is appled when MMU is turned on in boot process of ARM64<o:p></o:p></span></p></div></div><p class=MsoNormal><span lang=EN-US><o:p> </o:p></span></p><p><span lang=EN-US>Thank you for reply.<o:p></o:p></span></p><p><span lang=EN-US><o:p> </o:p></span></p><p><span lang=EN-US>I have a question about the meaning of "Until MMU is turned on, the CPU has been <o:p></o:p></span></p><p><span lang=EN-US>using physical address and pc-relative jumps."<o:p></o:p></span></p><pre><span lang=EN-US>I understand the CPU runs on physical address in assembly code before MMU is enabled.<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>But how is it possible?<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>For example, when the head.S is compiled, the PIC(position independent code) option is disabled as like this using -fno-PIE option:<o:p></o:p></span></pre><pre><span lang=EN-US style='font-family:"Courier New";color:black;background:white'><o:p> </o:p></span></pre><pre><span lang=EN-US style='font-family:"Courier New";color:black;background:white'>aarch64-linux-gnu-gcc -Wp,-MMD,arch/arm64/kernel/.head.o.d -nostdinc -isystem /usr/lib/gcc-cross/aarch64-linux-gnu/9/include -I./arch/arm64/include -I./arch/arm64/include/generated -I./include -I./arch/arm64/include/uapi -I./arch/arm6</span><span lang=EN-US style='font-family:"Courier New"'><o:p></o:p></span></pre><pre><span lang=EN-US style='font-family:"Courier New"'>4/include/generated/uapi -I./include/uapi -I./include/generated/uapi -include ./include/linux/compiler-version.h -include ./include/linux/kconfig.h -D__KERNEL__ -mlittle-endian -DKASAN_SHADOW_SCALE_SHIFT= -fmacro-prefix-map=./= -D__ASSEMB<o:p></o:p></span></pre><pre><span lang=EN-US style='font-family:"Courier New"'>LY__ -fno-PIE -mabi=lp64 -fno-asynchronous-unwind-tables -fno-unwind-tables -DKASAN_SHADOW_SCALE_SHIFT= -Wa,-gdwarf-2 -c -o arch/arm64/kernel/head.o arch/arm64/kernel/head.S<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>and system.map shows all the symbols of assembly code are virtual address. <o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Please let me know the method how the assembly code runs in PIC way.<o:p></o:p></span></pre><pre><span lang=EN-US>Only are the pc-relative jumps needed?<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Regards,<o:p></o:p></span></pre><pre><span lang=EN-US>J.Hwan KIm <o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><div><p class=MsoNormal><span lang=EN-US>On 22. 3. 18. 14:35, Chan Kim wrote:<o:p></o:p></span></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Hi JeongHwan,<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Recently I followed the kernel boot process so now I understand how it's<o:p></o:p></span></pre><pre><span lang=EN-US>doing.<o:p></o:p></span></pre><pre><span lang=EN-US>The kernel starts at HEAD and it jumps to primary_entry. (code below is<o:p></o:p></span></pre><pre><span lang=EN-US>5.10.0. but in 5.4.21 it jumped to stext, just name change)<o:p></o:p></span></pre><pre><span lang=EN-US>Primary_entry looks like this.<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US> SYM_CODE_START(primary_entry)<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US> bl preserve_boot_args<o:p></o:p></span></pre><pre><span lang=EN-US> bl el2_setup // Drop to EL1, w0=cpu_boot_mode<o:p></o:p></span></pre><pre><span lang=EN-US> adrp x23, __PHYS_OFFSET<o:p></o:p></span></pre><pre><span lang=EN-US> and x23, x23, MIN_KIMG_ALIGN - 1 // KASLR offset, defaults to<o:p></o:p></span></pre><pre><span lang=EN-US>0<o:p></o:p></span></pre><pre><span lang=EN-US> bl set_cpu_boot_mode_flag<o:p></o:p></span></pre><pre><span lang=EN-US> bl __create_page_tables<o:p></o:p></span></pre><pre><span lang=EN-US> /*<o:p></o:p></span></pre><pre><span lang=EN-US> * The following calls CPU setup code, see arch/arm64/mm/proc.S<o:p></o:p></span></pre><pre><span lang=EN-US>for<o:p></o:p></span></pre><pre><span lang=EN-US> * details.<o:p></o:p></span></pre><pre><span lang=EN-US> * On return, the CPU will be ready for the MMU to be turned on<o:p></o:p></span></pre><pre><span lang=EN-US>and<o:p></o:p></span></pre><pre><span lang=EN-US> * the TCR will have been set.<o:p></o:p></span></pre><pre><span lang=EN-US> */<o:p></o:p></span></pre><pre><span lang=EN-US> bl __cpu_setup // initialise processor<o:p></o:p></span></pre><pre><span lang=EN-US> b __primary_switch<o:p></o:p></span></pre><pre><span lang=EN-US> SYM_CODE_END(primary_entry)<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>The page tables for id mapping (for 0x80000000 ~ .. physical address) and<o:p></o:p></span></pre><pre><span lang=EN-US>swapper_pgdir (for virtual address) are setup inside __create_page_tables.<o:p></o:p></span></pre><pre><span lang=EN-US>MMU is turned on in __primary_switch. (code below for 5.10.0-rc5)<o:p></o:p></span></pre><pre><span lang=EN-US>You see there is bl __enable_mmu. Until MMU is turned on, the CPU has been<o:p></o:p></span></pre><pre><span lang=EN-US>using physical address and pc-relative jumps. <o:p></o:p></span></pre><pre><span lang=EN-US>At the instant MMU is turned on, the page table for the current physical<o:p></o:p></span></pre><pre><span lang=EN-US>address range is already setup so there is no problem using physical<o:p></o:p></span></pre><pre><span lang=EN-US>address.(just identical mapping) <o:p></o:p></span></pre><pre><span lang=EN-US>The first place where kernel virtual address is used is at the end of<o:p></o:p></span></pre><pre><span lang=EN-US>__primary_switch. The value __primary_switched is a virtual address<o:p></o:p></span></pre><pre><span lang=EN-US>(starting with 0xffffffc0....) and from that point on virtual->physical<o:p></o:p></span></pre><pre><span lang=EN-US>address mapping is used. Old version will be the same. (I checked<o:p></o:p></span></pre><pre><span lang=EN-US>previously for 5.4.21)<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US> SYM_FUNC_START_LOCAL(__primary_switch)<o:p></o:p></span></pre><pre><span lang=EN-US> #ifdef CONFIG_RANDOMIZE_BASE<o:p></o:p></span></pre><pre><span lang=EN-US> mov x19, x0 // preserve new SCTLR_EL1 value<o:p></o:p></span></pre><pre><span lang=EN-US> mrs x20, sctlr_el1 // preserve old SCTLR_EL1<o:p></o:p></span></pre><pre><span lang=EN-US>value<o:p></o:p></span></pre><pre><span lang=EN-US> #endif<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US> adrp x1, init_pg_dir<o:p></o:p></span></pre><pre><span lang=EN-US> bl __enable_mmu<o:p></o:p></span></pre><pre><span lang=EN-US> #ifdef CONFIG_RELOCATABLE<o:p></o:p></span></pre><pre><span lang=EN-US> #ifdef CONFIG_RELR<o:p></o:p></span></pre><pre><span lang=EN-US> mov x24, #0 // no RELR displacement yet<o:p></o:p></span></pre><pre><span lang=EN-US> #endif<o:p></o:p></span></pre><pre><span lang=EN-US> bl __relocate_kernel<o:p></o:p></span></pre><pre><span lang=EN-US> #ifdef CONFIG_RANDOMIZE_BASE<o:p></o:p></span></pre><pre><span lang=EN-US> ldr x8, =__primary_switched<o:p></o:p></span></pre><pre><span lang=EN-US> adrp x0, __PHYS_OFFSET<o:p></o:p></span></pre><pre><span lang=EN-US> blr x8<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US> /*<o:p></o:p></span></pre><pre><span lang=EN-US> * If we return here, we have a KASLR displacement in<o:p></o:p></span></pre><pre><span lang=EN-US>x23 which we need<o:p></o:p></span></pre><pre><span lang=EN-US> * to take into account by discarding the current kernel<o:p></o:p></span></pre><pre><span lang=EN-US>mapping and<o:p></o:p></span></pre><pre><span lang=EN-US> * creating a new one.<o:p></o:p></span></pre><pre><span lang=EN-US> */<o:p></o:p></span></pre><pre><span lang=EN-US> pre_disable_mmu_workaround<o:p></o:p></span></pre><pre><span lang=EN-US> msr sctlr_el1, x20 // disable the MMU<o:p></o:p></span></pre><pre><span lang=EN-US> isb<o:p></o:p></span></pre><pre><span lang=EN-US> bl __create_page_tables // recreate kernel<o:p></o:p></span></pre><pre><span lang=EN-US>mapping<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US> tlbi vmalle1 // Remove any stale TLB<o:p></o:p></span></pre><pre><span lang=EN-US>entries<o:p></o:p></span></pre><pre><span lang=EN-US> dsb nsh<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US> msr sctlr_el1, x19 // re-enable the MMU<o:p></o:p></span></pre><pre><span lang=EN-US> isb<o:p></o:p></span></pre><pre><span lang=EN-US> ic iallu // flush instructions fetched<o:p></o:p></span></pre><pre><span lang=EN-US> dsb nsh // via old mapping<o:p></o:p></span></pre><pre><span lang=EN-US> isb<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US> bl __relocate_kernel<o:p></o:p></span></pre><pre><span lang=EN-US> #endif<o:p></o:p></span></pre><pre><span lang=EN-US> #endif<o:p></o:p></span></pre><pre><span lang=EN-US> ldr x8, =__primary_switched<o:p></o:p></span></pre><pre><span lang=EN-US> adrp x0, __PHYS_OFFSET<o:p></o:p></span></pre><pre><span lang=EN-US> br x8<o:p></o:p></span></pre><pre><span lang=EN-US> SYM_FUNC_END(__primary_switch)<o:p></o:p></span></pre><pre><span lang=EN-US> <o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Hope this helps.<o:p></o:p></span></pre><pre><span lang=EN-US>Have a nice day!<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Chan<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><pre><span lang=EN-US>-----Original Message-----<o:p></o:p></span></pre><pre><span lang=EN-US>From: JeongHwan Kim <a href="mailto:frog007.kernel.kr@gmail.com"><frog007.kernel.kr@gmail.com></a><o:p></o:p></span></pre><pre><span lang=EN-US>Sent: Friday, March 18, 2022 10:41 AM<o:p></o:p></span></pre><pre><span lang=EN-US>To: <a href="mailto:kernelnewbies@kernelnewbies.org">kernelnewbies@kernelnewbies.org</a><o:p></o:p></span></pre><pre><span lang=EN-US>Subject: Which Page table is appled when MMU is turned on in boot process<o:p></o:p></span></pre><pre><span lang=EN-US>of ARM64<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Hi, everyone<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>When ARM64 boots, it setup 2 page tables ("idmap_pg_dir" and<o:p></o:p></span></pre><pre><span lang=EN-US>"swapper_pgdir").<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>On turning on MMU, which page table is applied?<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>I heard that "idmap_pg_dir" is applied as soon as MMU is turned on.<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>I cannot understand why "idmap_pg_dir" is applied, which is for "Lower"<o:p></o:p></span></pre><pre><span lang=EN-US>address.<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>As I understand, the virtual address of kernel code is in "Higher"<o:p></o:p></span></pre></blockquote><pre><span lang=EN-US>address.<o:p></o:p></span></pre><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Can you explain why "idmap_pg_dir" is applied on MMU turning on?<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>Thanks in advance<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>J.Hwan Kim<o:p></o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US>_______________________________________________<o:p></o:p></span></pre><pre><span lang=EN-US>Kernelnewbies mailing list<o:p></o:p></span></pre><pre><span lang=EN-US><a href="mailto:Kernelnewbies@kernelnewbies.org">Kernelnewbies@kernelnewbies.org</a><o:p></o:p></span></pre><pre><span lang=EN-US><a href="https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies">https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies</a><o:p></o:p></span></pre></blockquote><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> </o:p></span></pre><pre><span lang=EN-US><o:p> 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