<div dir="ltr">Hi Silverstri,<div class="gmail_extra"><br><br><div class="gmail_quote">On Fri, Feb 7, 2014 at 12:54 AM, m silverstri <span dir="ltr"><<a href="mailto:michael.j.silverstri@gmail.com" target="_blank">michael.j.silverstri@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi,<br>
<br>
I allocate memory in my driver and I passed this address to my HW<br>
register to write to. My question is when the HW done writing (my<br>
driver get notified by an interrupt). How can I flush the cache so<br>
that my driver can see what has been written by the HW?<br></blockquote><div>There are some basic problems in your design.</div><div><br></div><div>If you are using external agents like DMA( or any other HW capable of writing to DDR), do not cache Memory.</div>
<div>Because if you do, your processor will cache the memory and will not see the updates done by external agents.</div><div>If you want to maintain coherency, allocate memory using dma_allocate_coherent.<br></div><div><br>
</div><div>Thanks,</div><div>Arun</div><div><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Thank you.<br>
<br>
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