<div dir="ltr">Hi all,<div><br></div><div style>I have the one .c source file that I want to create multiple kernel modules out of it by setting macros using the makefile. </div><div style><br></div><div style>The idea is that if -DMODULE1 is set, I'll build module1.ko and if -DMODULE2 is set, I'll build module 2.</div>
<div style><br></div><div style>Does anyone know how to do this? I created the following makefile:</div><div style><br></div><div style>...</div><div style>module1: override obj-m := module1.o</div><div style>module1: EXTRA_CFLAGS += -DMODULE1<br>
</div><div style><br></div><div style>module1:</div><div style><span class="" style="white-space:pre"> $(MAKE) -C $(KDIR) M=$(PWD) modules</span><br></div><div style><span class="" style="white-space:pre"><br></span></div>
<div style><span class="" style="white-space:pre"><div style="white-space:normal">module2: override obj-m := module2.o</div><div style="white-space:normal">module2: EXTRA_CFLAGS += -DMODULE2<br></div><div><br></div></span></div>
<div style><span class="" style="white-space:pre">module2:</span></div><div style><span style="white-space:pre"> $(MAKE) -C $(KDIR) M=$(PWD) modules</span><br></div><div style><span style="white-space:pre">...</span></div>
<div><div><br></div><div style>But it isn't working as I expected. Anyone with kernel build system experience knows the answer for that?</div><div style><br></div><div style>Thanks,</div>-- <br>Henrique Rodrigues
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