<br>Hi All,<br><br>My comments inline<br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div dir="ltr"> can you please tell me your kernel version?<br>
</div></div></blockquote><div>It's linux 2.6.10 <br></div><blockquote class="gmail_quote" style="margin:0pt 0pt 0pt 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div><div dir="ltr"> SA_INTERRUPT is deprecated for many years. it is changed to be IRQF_DISABLED, which is also deprecated since 2.6.35.<br>
in kernel 2.6.35, top half interrupt handler will be called with interrupts <font color="#ff0000">disabled</font>, <br> <br> and for SA_SHIRQ, it is changed to be IRQF_SHARED, you should check the return value of request_irq() to see whether your irq can be shared with former <br>
registered irq which use the same int line. suppose you are registering irq19 for usb, and the BT module has reigstered irq19 with IRQF_SHARED flag, then you are lucky enough to reigter correctly for usb. opposite, if BT module registered irq19 without IRQF_SHARED flag, then BT will use irq19 alone, it means your register for usb will fail .<br>
<br></div></div></blockquote><div><br>request_irq( irq, soc_intr, SA_INTERRUPT | SA_SHIRQ,<br>
MODULE_NAME, dev);<br><br>I am assuming that when I specify both SA_INTERRUPT and SA_SHIRQ in request_irq then there are 3 possibilities:<br><br>1. If the 'irq' is free then I will be granted the line in SA_INTERRUPT mode i.e all the other maskable interrupts will be disabled when<br>
my top_half is executing.<br><br>2. If the 'irq' is already granted to some other device in SA_SHIRQ mode then I will also get it in SA_SHIRQ mode i.e all the maskable <br> interrupts enabled execpt from the device whose ISR Top_half is executing.<br>
<br>3. If the 'irq' is already granted to some other device in SA_INTERRUPT mode then my request_irq will fail.<br><br><br>I hope this is the right assumption just my only doubt is does the above behavior in any way depends on the CPU arch. i.e is it different for x86 and PPC ?<br>
<br><br>Regards,<br>Devendra<br></div></div>