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On 2011년 08월 26일 03:19, Akash wrote:
<blockquote
cite="mid:CAN1N8TgGg-FRVesNaAFHX-hvX6cY=AQ_Er8sGwz6-K02ViLUng@mail.gmail.com"
type="cite">Try programming the CPU-irq affinity by writing to <br>
<br>
/proc/irq/<irq-number>/smp_affinity<br>
<br>
For example masks for irqs could be :<br>
irq 97 - 0x1<br>
99 - 0x2<br>
103 - 0x4<br>
104 - 0x8<br>
<br>
That way, you are hardcoding on which cpu the particular irqs
should land.<br>
<br>
HTH<br>
Akash<br>
<br>
<div class="gmail_quote">On Thu, Aug 25, 2011 at 4:08 AM, J.Hwan
Kim <span dir="ltr"><<a moz-do-not-send="true"
href="mailto:frog1120@gmail.com">frog1120@gmail.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt
0.8ex; border-left: 1px solid rgb(204, 204, 204);
padding-left: 1ex;">
Hi, everyone<br>
<br>
The interrupts of my ixgbevf driver occurs only Core 0<br>
although the user space "irqbalance" serivce is working.<br>
<br>
How can I distribute the interrupt of RX in ixgbevf to all
cores?<br>
Is there any kernel compile option for it ?<br>
<br>
<br>
cat /proc/interrupts | grep "isv"<br>
97: 8 0 0 0 0<br>
0 0 0 PCI-MSI-edge isv0-rx-0<br>
99: 7 0 0 0 0<br>
0 0 0 PCI-MSI-edge isv0:lsc<br>
103: 2059 0 0 0 0<br>
0 0 0 PCI-MSI-edge isv2-rx-0<br>
104: 14 0 0 0 0<br>
0 0 0 PCI-MSI-edge isv2-tx-0<br>
105: 1 0 0 0 0<br>
0 0 0 PCI-MSI-edge isv2:mbx<br>
<br>
"isv" is netdevice name of my ixgbevf.<br>
<br>
</blockquote>
</div>
</blockquote>
<br>
Thank you for reply.<br>
I want to distribute, for example, IRQ 103 to all cores as follows :<br>
103 : 111 2344 1334 3233 2233 1111 2233 362262 isv2-rx-0<br>
That cannot be achieved by setting /proc/irq/irq-num/smp_affinity.<br>
<br>
<br>
<br>
<br>
<br>
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