<p><br>
On Aug 6, 2011 1:57 PM, "Mulyadi Santosa" <<a href="mailto:mulyadi.santosa@gmail.com">mulyadi.santosa@gmail.com</a>> wrote:<br>
><br>
> On Sat, Aug 6, 2011 at 23:59, subin gangadharan<br>
> <<a href="mailto:subingangadharan@gmail.com">subingangadharan@gmail.com</a>> wrote:<br>
> > Hi All,<br>
> > I have some doubts on the alignment requirement.It would be really<br>
> > helpful,if someone can shed some light on this.<br>
> > Why there are so many different types of alignment like 4 byte, 8 byte,16<br>
> > byte ?.My exact question is, in a 32 bit machine(I assume processor reads<br>
> > data in 4 bytes),how 16 byte alignment makes different from 4 byte alignment<br>
> > ?.How this will influence the processor performance ?.<br>
><br>
> personal guess: cache line alignment?<br>
><br>
> ... so the data all can be read in one read swipe.....<br>
><br>
> or in other hand, if several data has different access type (some are<br>
> read only, the rest are read/write), then by aligning them to<br>
> different cache line, they won't interfere to each other...since AFAIK<br>
> a write to even one bit in a cache line will update the whole cache<br>
> line. Other data in the same cache line will stay, they will be just<br>
> rewritten AFAIK.<br>
><br>
> I hope my guess is right :)</p>
<p>Too complex I think. Don't try to think so hard. ;-)</p>
<p>Most cpu's offer an atomic test_and_set instruction.</p>
<p>It is used to write busy loop semaphore code like.</p>
<p> While (test_and_set(flag) == false);<br>
# coded in assembly</p>
<p>Normally that busy loops until flag initially has a value of zero during the test and the test changes it to a one.</p>
<p>But if test_and_set always fails due lack of alignment, that loop will never finish.</p>
<p>Greg<br>
</p>