My Apologies for top posting. Now in continuation to my previous question. Is there a method to know whether segmentation unit is enabled or disabled either from Kernel space or user space. <br><br>Thanks,<br>Prabhu<br><br>
<br><div class="gmail_quote">On Mon, Apr 25, 2011 at 10:08 PM, mindentropy <span dir="ltr"><<a href="mailto:mindentropy@gmail.com">mindentropy@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">
<div><div></div><div class="h5">On Monday 25 Apr 2011 2:25:10 pm Prabhu nath wrote:<br>
> I understand about Linear virtual address and Physical address. How is the<br>
> logical address generated ? Can you please explain.<br>
><br>
> Thanks,<br>
> Prabhu<br>
><br>
> On Wed, Apr 20, 2011 at 9:33 PM, mindentropy <<a href="mailto:mindentropy@gmail.com">mindentropy@gmail.com</a>> wrote:<br>
> > On Wednesday 20 Apr 2011 4:31:08 pm limp wrote:<br>
> > > Thanks a lot Dace and Vladimir for your replies.<br>
> > ><br>
> > > First of all, I forgot to mention that I am talking for x86<br>
> > > architecture.<br>
> > ><br>
> > > > The CPU registers will contain the virtual addresses. Each and every<br>
> > > > time that the CPU tries to access a virtual memory location, then the<br>
> > > > address will be translated by the MMU into a physical address.<br>
> > ><br>
> > > So, AFAIU the translation to physical memory takes place *only* when<br>
> > > the ALU of the processor has to do some operation which has memory<br>
> > > operands (in this case the CPU needs to deal with the *real*<br>
> > > addresses) but not prior to that.<br>
> ><br>
> > The address translation happens in the following way:<br>
> ><br>
> > Logical Addr-->|Segmentation Unit|-->Linear Addr -->|Paging unit|--><br>
> > Physical<br>
> > Addr.<br>
> ><br>
> > If the paging unit is not setup then the linear addr is the physical<br>
> > addr.<br>
> ><br>
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<br>
</div></div>In the segmented memory model the memory appears as segments. In this model<br>
the program issues a logical address which comprises of a segment:offset<br>
address. The offset selects a byte in the segment. The segmentation unit<br>
converts it to a linear address. If the paging unit is enabled the linear<br>
address passes through the paging unit for further translation.<br>
<br>
<br>
Also please do not top post :)<br>
</blockquote></div><br>