ARM v7 based SoC showing random behaviour with kernel and uboot

[AYAN KUMAR HALDER]

Hi,

This query is about a random behaviour observed on on 2 out of 35 ARM
v7 based chipsets. The intention here is to ask about the further
diagnostic approach that should be done to root cause the malfunction
observed only on 2 chipsets (Rest 33 chipsets are working fine
consistently). All the 35 chipsets have the same SoC architecture.

When the chipsets boot up (from uboot), I see that intermittently (1
out of 3 boots), the boot up halts/resets(sometimes) at uboot (while
accessing some registers from ddr controller) or at kernel. The
behaviour changes with temperature (some times seen prominently at
lower temperatures like -5) or with logs (adding more console logs
causes the occurence of this issue to diminish) or even by removing
some external peripheral (i2c) access during bootup or by adding
instructions like memory barriers/cache flush (which causes the
occurence of the issue to diminish).

I need some guidance/pointers to debug such issues further. Please
note that we are observing such issues on silicon (SoC) and we do not
have the fpga model available (for chipscope debugging). I need to
give a concrete explanation for the malfunction observed on the 2
chipsets.

In case if this is an inappropriate forum, I would humbly request to
let me the know the appropriate forum to ask such queries.

Regards,
Ayan Kumar Halder