Stable and synchronized Time Stamp Counter.

[Gadre Nayan]

 Hi,

I am trying to get the TSC_OFFSET of my guest Qemu machine,
Some of the pre-requisites mentioned involve having a Stable TSC (i.e. TSC
should not move backawards)

So when I enable the write_tsc events in
/sys/kernel/debug/tracing/.../kvm_write_tsc_offset I get the following
trace:

* qemu-system-x86-6668  [003] d... 24541634690432: kvm_write_tsc_offset:
vcpu=0 prev=18446721743031245116 next=18446719532074865476*
 qemu-system-x86-6668  [003] d... 24541659629082: kvm_write_tsc_offset:
vcpu=0 prev=18446719532074865476 next=18446719532074865476
* qemu-system-x86-6668  [001] d... 33935995282794: kvm_write_tsc_offset:
vcpu=0 prev=18446719532074865476 next=18446710137714276900*
 qemu-system-x86-6668  [000] d... 33936022496954: kvm_write_tsc_offset:
vcpu=0 prev=18446710137714276900 next=18446710137714276900

Here, the prev value is more than the next value, I think this means that
my TSC is growing backwards.

Is the direction of TSC a configurable option ?
How to ensure the TSC grows forwards.

Also what does Synchronized TSC mean, how to know if the TSC is
synchronized and how to fix it if it not synchronized.

Thanks
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