Unable to get stmmac driver of Altera Cyclone V to support MTU9000

[Teoh Choon Zone]

On Mon, Sep 28, 2015 at 11:39 AM, <Valdis.Kletnieks at vt.edu> wrote:

> It's possible it's a defective design, and is crippled so it can manage
> 8144 but not the 9000 most chipsets can do.  The fact that 8144 works
> is proof the chipset *does* have a concept of jumbograms - but there's
> been a *lot* of misdesigned chips that have this sort of issue....
>
> Your choices may be limited to running the subnet with an MTU of 8144, or
> replacing the defective card.  Have you found anything online claiming that
> the card *can* specifically support MTU=9000?, or reached out to the
> company?
>

Actually initially I can only ping up to MTU 4042, and I have clarified
with Altera, they also said that is the maximum MTU supported.

But after that I learned from the technical reference manual and play
around with the stmmac driver, if I run Tx in store-and-forward mode and Rx
in threshold mode, I can ping up to MTU 8144. And according to the TRM, the
GMAC indeed can support up to MTU 9.6KB. That's why I'm thinking maybe is
the ethernet driver has some parts need to be configured properly to suit
my particular GMAC.

In particular, I've a hunch that this is related to the FIFO size and
descriptor offset. The GMAC that I'm using has Tx and Rx FIFO size of 4kB
each and supports up to 8kB descriptor. The confusing part are the
following lines in ring_mode.c:

In functions stmmac_jumbo_frm,
desc->des2 = dma_map_single(priv->device, skb->data,
   bmax, DMA_TO_DEVICE); // where bmax is 8192
desc->des3 = desc->des2 + BUF_SIZE_4KiB;


In functions stmmac_refill_desc3 and stmmac_init_desc3
p->des3 = p->des2 + BUF_SIZE_8KiB;

Although the maximum FIFO size are 8kB for both of them (verified from
descs.h), why is the offset are different?
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