Understanding disassembly x86 + understanding function call + parameter pass and stack frame

nidhi mittal hada nidhimittal19 at gmail.com
Wed Aug 14 06:21:20 EDT 2013


On Tue, Aug 13, 2013 at 6:02 PM, amit mehta <gmate.amit at gmail.com> wrote:

> On Tue, Aug 13, 2013 at 5:47 PM, nidhi mittal hada
> <nidhimittal19 at gmail.com> wrote:
> > thats the information of coredump file:-
> >       KERNEL: vmlinux
> >     DUMPFILE: vmcore.1  [PARTIAL DUMP]
> >         CPUS: 8
> >         DATE: Mon Jun 11 09:10:59 2012
> >       UPTIME: 13 days, 22:39:30
> > LOAD AVERAGE: 83.88, 62.23, 30.30
> >        TASKS: 393
> >     NODENAME: million.ind.hp.com
> >      RELEASE: 2.6.32-220.el6.hpsp16k1.x86_64
> >      VERSION: #1 SMP Mon Nov 19 17:07:07 UTC 2012
> >      MACHINE: x86_64  (2132 Mhz)
> >       MEMORY: 96 GB
> >        PANIC: "Kernel panic - not syncing: Watchdog detected hard LOCKUP
> on cpu 4"
> >          PID: 26715
> >      COMMAND: "mount.*******"
> >         TASK: ffff8817dd4de0c0  [THREAD_INFO: ffff8802c3f80000]
> >          CPU: 4
> >        STATE: TASK_UNINTERRUPTIBLE (PANIC)
> >
>
> Seems, interrupts are not being re-enabled after a considerable amount of
> time.
> BTW, I'd suggest you to refrain from posting internal organizational
> details such
> as the NODENAME above, in the public mailing lists.
>
> !!amit
>


Hi Amit/Tobias,

I have understood that

*for x86_64 architecture and linux as operating system , GCC as compiler ,
the calling convention to be followed is AMD64 ABI.*
right?

*My doubt is :-*
1) Is the above statement true only for stack frames function call etc ?
OR
Is the above statement true for other things related to architecture,
like for knowing data type sizes, endianness, alignment ..

as http://www.uclibc.org/docs/psABI-x86_64.pdf, mentions , data type size
alignment etc everything ...
are these things same for AMD and x86 architecture both ???

2)Depending on data type, this above doc defines classes in which a
specific data type lie ..
classes like INTEGER, MEMORY , SSE, SSEUP etc ..
are same things applicable in my infrastructure too
OR
they are specific to AMD architecture... if so then whats followed on
x86_64 ..

3) is everything in this doc applicable to x86_64 or just a portion of it
can be followed
for x86_64 ?



Thanks
Nidhi
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