Please correct this code
Sri Ram Vemulpali
sri.ram.gmu06 at gmail.com
Mon Jan 31 15:22:16 EST 2011
thanks for all explanation, it really helped to refine my code
Sri
On Mon, Jan 31, 2011 at 12:58 PM, Rajat Sharma <fs.rajat at gmail.com> wrote:
>> Is is not that Code A is wrong, for not mentioning cobbler list
>> 'memory' to indicate memory contents are getting updated.
>> Please rectify me, if I am wrong.
>
> From Code B, it looks like instruction to compiler for not using extra
> memory location other than ones specified for input param and output
> param. Is it some sort of memory synchronization code?
>
>> Also, what does '+m' constraint mean, if I use in inline assembly.
>
> It means the memory location for param is both Readable and Writable
>
> Rajat
>
> On Mon, Jan 31, 2011 at 10:07 PM, Sri Ram Vemulpali
> <sri.ram.gmu06 at gmail.com> wrote:
>> Hi,
>>
>> I have following snippet of code.
>>
>> Code A
>>
>> __asm__ __volatile__(
>> " lock ;\n"
>> " addl %1,%0 ;\n"
>> : "=m" (my_var)
>> : "ir" (my_int), "m" (my_var)
>> : /* no clobber-list */
>> );
>>
>> Code B
>>
>> __asm__ __volatile__( "decl %0; sete %1"
>> : "=m" (my_var), "=q" (cond)
>> : "m" (my_var)
>> : "memory"
>> );
>>
>> In Code A memory contents are getting updated. And in Code B memory
>> contents and 'cond' var are getting updated.
>> In Code B in cobbler column 'memory' is used to indicate that this
>> code modifies memory contents. But where as in Code A it was not
>> mentioned
>>
>> Is is not that Code A is wrong, for not mentioning cobbler list
>> 'memory' to indicate memory contents are getting updated.
>> Please rectify me, if I am wrong.
>>
>> Also, what does '+m' constraint mean, if I use in inline assembly.
>> --
>> Regards,
>> Sri.
>>
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>>
>
--
Regards,
Sri.
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