memory barrier in UP

[Mulyadi Santosa]

Hi Subin....

On Tue, Dec 13, 2011 at 01:57, subin gangadharan
<subingangadharan at gmail.com> wrote:
> Hi Mulyadi,
>
> Thanks for the answer.

You welcome...I just shared what I know :)

> In that case (ALPHA), is compiler barrier sufficient enough to prevent
> the re ordering done by the processor.
> What I was thinking,compiler barrier is to instruct the compiler to
> not do any re ordering.

Again this is architecture problem. I am not sure about Alpha, since I
only know about one compiler barrier that is "volatile". What I guess
is that in Alpha, it could be something else....maybe it is assembly
instruction like "lock" or something.

I remember there's an old Linuxjournal article that explains about it.
So to avoid further misunderstandings that I might bring, please
kindly read this article:
http://www.linuxjournal.com/article/8212

Hope that helps...

-- 
regards,

Mulyadi Santosa
Freelance Linux trainer and consultant

blog: the-hydra.blogspot.com
training: mulyaditraining.blogspot.com