VMA of processes and CPU registers

[mindentropy]

On Monday 25 Apr 2011 2:25:10 pm Prabhu nath wrote:
> I understand about Linear virtual address and Physical address. How is the
> logical address generated ? Can you please explain.
> 
> Thanks,
> Prabhu
> 
> On Wed, Apr 20, 2011 at 9:33 PM, mindentropy <mindentropy at gmail.com> wrote:
> > On Wednesday 20 Apr 2011 4:31:08 pm limp wrote:
> > > Thanks a lot Dace and Vladimir for your replies.
> > > 
> > > First of all, I forgot to mention that I am talking for x86
> > > architecture.
> > > 
> > > > The CPU registers will contain the virtual addresses. Each and every
> > > > time that the CPU tries to access a virtual memory location, then the
> > > > address will be translated by the MMU into a physical address.
> > > 
> > > So, AFAIU the translation to physical memory takes place *only* when
> > > the ALU of the processor has to do some operation which has memory
> > > operands (in this case the CPU needs to deal with the *real*
> > > addresses) but not prior to that.
> > 
> > The address translation happens in the following way:
> > 
> > Logical Addr-->|Segmentation Unit|-->Linear Addr -->|Paging unit|-->
> > Physical
> > Addr.
> > 
> > If the paging unit is not setup then the linear addr is the physical
> > addr.
> > 
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In the segmented memory model the memory appears as segments. In this model 
the program issues a logical address which comprises of a segment:offset 
address. The offset selects a byte in the segment. The segmentation unit 
converts it to a linear address. If the paging unit is enabled the linear 
address passes through the paging unit for further translation.


Also please do not top post :)